8051 data types and directives. DB (define byte) The DB directive is the most widely used data directive in the assembler. It is used to define the 8-bit data. When DB is used to define data, the numbers can be in decimal, binary, hex, or ASCII formats.
Description: MOVC moves a byte from Code Memory into the Accumulator. The Code Memory address from which the byte will be moved is calculated by summing the value of the Accumulator with either DPTR or the Program Counter (PC).
Indexed Addressing
Indexed addressing mode is used to access elements in arrays which are stored in memory at consecutive locations. This addressing mode will allow the program to access a location by incrementing or decrementing the index value. The instructions would include an index register and an offset.The LJMP instruction transfers program execution to the specified 16-bit address. The PC is loaded with the high-order and low-order bytes of the address from the second and third bytes of this instruction respectively. No flags are affected by this instruction. See Also: AJMP, SJMP.
CALL instruction is another control transfer instruction. CALL instruction is used to call a subroutine. Using a subroutine make a program more structured and helps in reducing memory space. There are two instructions for CALL in the 8051 programming. LCALL [Long Call] and ACALL [Absolute call].
An instruction is an order given to a computer processor by a computer program. In assembler language, a macro instruction is one that, during processing by the assembler program, expands to become multiple instructions (based on a previously coded macro definition).
In 8051 There are six types of addressing modes.
- Immediate AddressingMode.
- Register AddressingMode.
- Direct AddressingMode.
- Register IndirectAddressing Mode.
- Indexed AddressingMode.
- Implied AddressingMode.
The instruction set, also called ISA (instruction set architecture), is part of a computer that pertains to programming, which is basically machine language. The instruction set provides commands to the processor, to tell it what it needs to do.
? The control transfer instructions do not affect the flags of 8086.
Which instruction is used to check the status of a single bit? Explanation: JNB which stands for Jump if no bit checks the status of the bit P0. 0 and jumps if the bit is 0.
A processor register (CPU register) is one of a small set of data holding places that are part of the computer processor. A register may hold an instruction, a storage address, or any kind of data (such as a bit sequence or individual characters). Some instructions specify registers as part of the instruction.
13. Which of the following is not a machine control flag? Explanation: The flag register of 8086 is divided into status flags or condition code flags and machine control flags. Direction, Interrupt, Trap flags comes under machine control flags.
3. Which of the following is bit-addressable register? Explanation: The registers, accumulator, PSW, B, P0, P1, P2, P3, IP, IE, TCON and SCON are all bit-addressable registers. Explanation: The registers, DPH and DPL are the higher and lower bytes of a 16-bit register DPTR.
8088 and 8085 is 8 bit microprocessor. The Intel 8085 is an 8-bit microprocessor. Its data bus is 8-bit wide and hence, 8 bits of data can be transmitted in parallel from or to the microprocessor.
1) In computers, an operand is the part of a computer instruction that specifies data that is to be operating on or manipulated and, by extension, the data itself. 2) In mathematics, an operand is the object of a mathematical operation.
The contents of IP are replaced by the effective branch address. This addressing mode may be used only in unconditional branch instructions. Intersegment Direct. Replaces the contents of IP with part of the instruction and the contents of CS with another part of the instruction.
Which of the following is not a bit test instruction? Explanation: The instruction, BSF, is a bit scan instruction. The four bit test instructions are: BT (Test a Bit), BTC (Test a Bit and Complement), BTR (Test and Reset a Bit) and BTS (Test and Set a bit).
What is the time taken by one machine cycle if crystal frequency is 20MHz? Explanation: It will be executed 200*100 times.
3. What is the order decided by a processor or the CPU of a controller to execute an instruction? Explanation: While any instruction is being executed, a microcontroller first fetches the instruction (captures its operand and operator).
RISC Processors -Considerable factors
- a. Simplicity in Instruction Set.
- b. Pipeline Instruction Optimization.
- c. Register Usage Optimization.
- d. All of the above.
1. When an interrupt is enabled, then where does the pointer moves immediately after this interrupt has occurred? Explanation: When an interrupt is enabled, then it goes to the vector table where the address of the ISR is placed. 2.
When we add two numbers the destination address must always be.
In POP instruction, after each execution of the instruction, the stack pointer is a) incremented by 1 b) decremented by 1 c) incremented by 2 d) decremented by 2 Answer: c Explanation: The actual current stack top is poped into the specific operand as the contents of stack top memory is stored in AL&SP and further
1. Which of the following is not one of the SFR addresses of the ports of 8051? Explanation: The SFR addresses of the ports P0, P1, P2 and P3 are 80H, 90H, A0H and B0H respectively.
Which instruction cannot force the 8086 processor out of 'halt' state? Explanation: Only an interrupt request or Reset will force the 8086 processor to come out of the 'halt' state. Explanation: NOP is the No operation. It means that the processor performs no operation for the clock cycle and thus there exists a delay.
The accumulator, B register, Po, P1, P2, P3, IE registers are bit-addressable register remaining all are byte-addressable registers. The accumulator which is also known as ACC or A is a bit as well as a byte-addressable register by an address of the accumulator.
The Stack Pointer (SP) register is used to indicate the location of the last item put onto the stack. When you PUT something ONTO the stack (PUSH onto the stack), the SP is decremented before the item is placed on the stack.
When the 8051 is initialized, the SP register contains the value 07H. This means that the RAM location 08 is the first location used for the stack. The storing operation of a CPU register in the stack is known as a PUSH, and getting the contents from the stack back into a CPU register is called a POP.
As the stack is a section of a RAM, there are registers inside the CPU to point to it. The register used to access the stack is known as the stack pointer register. The stack pointer in the 8051 is 8-bits wide, and it can take a value of 00 to FFH. When the 8051 is initialized, the SP register contains the value 07H.
The stack pointer "SP" is the register which holds the address of the top of the stack. On the HC12 and HCS12, the SP points to the last byte placed on the stack. That is, the SP register contains the memory address of the last byte put on the stack, and data is pushed or pulled to/from this address.
A stack pointer is a small register that stores the address of the last program request in a stack. A stack is a specialized buffer which stores data from the top down. As new requests come in, they "push down" the older ones.
The stack. The stack is an area of RAM where a program stores temporary data during the execution of code blocks. Typically statically allocated, the stack is operates on a “last in, first out” basis. The life span of variables on the stack is limited to the duration of the function.
The main difference between stack pointer and program counter is that the stack pointer is a register that stores the address of the last program request in a stack while the program counter is a register that stores the address of the next instruction to be executed from the memory.
